Mesh4all
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periph_conf.h
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1 /*
2  * Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com>
3  * Copyright (C) 2017 Dan Evans <photonthunder@gmail.com>
4  * Copyright (C) 2021 Mesh4all <mesh4all.org>
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
18 #ifndef PERIPH_CONF_H
19 #define PERIPH_CONF_H
20 
21 #include <stdint.h>
22 #include "cpu.h"
23 #include "periph_cpu.h"
24 
25 #ifdef __cplusplus
26 extern "C"
27 {
28 #endif
29 
70 #define CLOCK_USE_PLL (1)
71 
75 #define CLOCK_USE_XOSC32_DFLL (0)
76 
84 #define GEN2_ULP32K (0)
85 
86 #if CLOCK_USE_PLL
91 #define CLOCK_PLL_MUL (47U)
96 #define CLOCK_PLL_DIV (1U)
101 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
102 #elif CLOCK_USE_XOSC32_DFLL
107 #define CLOCK_CORECLOCK (48000000U)
112 #define CLOCK_XOSC32K (32768UL)
113 #define CLOCK_8MHZ (1)
114 #else
119 #define CLOCK_DIV (1U)
120 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
121 #endif
127 static const tc32_conf_t timer_config[] = {
128  {
129  .dev = TC3,
130  .irq = TC3_IRQn,
131  .pm_mask = PM_APBCMASK_TC3,
132  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
133 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
134  .gclk_src = SAM0_GCLK_1MHZ,
135 #else
136  .gclk_src = SAM0_GCLK_MAIN,
137 #endif
138  .flags = TC_CTRLA_MODE_COUNT16,
139  },
140  {
141  .dev = TC4,
142  .irq = TC4_IRQn,
143  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
144  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
145 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
146  .gclk_src = SAM0_GCLK_1MHZ,
147 #else
148  .gclk_src = SAM0_GCLK_MAIN,
149 #endif
150  .flags = TC_CTRLA_MODE_COUNT32,
151  },
152 };
153 
158 #define TIMER_0_MAX_VALUE 0xffff
159 #define TIMER_0_ISR isr_tc3
160 #define TIMER_1_ISR isr_tc4
161 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
184 static const uart_conf_t uart_config[] = {
185  {
186  .dev = &SERCOM3->USART,
187  .rx_pin = GPIO_PIN(PA, 23),
188  .tx_pin = GPIO_PIN(PA, 22),
189 #ifdef MODULE_PERIPH_UART_HW_FC
190  .rts_pin = GPIO_UNDEF,
191  .cts_pin = GPIO_UNDEF,
192 #endif
193  .mux = GPIO_MUX_C,
194  .rx_pad = UART_PAD_RX_1,
195  .tx_pad = UART_PAD_TX_0,
196  .flags = UART_FLAG_NONE,
197  .gclk_src = SAM0_GCLK_MAIN,
198  },
199  {
200  .dev = &SERCOM4->USART,
201  .rx_pin = GPIO_PIN(PB, 9),
202  .tx_pin = GPIO_PIN(PB, 8),
203 #ifdef MODULE_PERIPH_UART_HW_FC
204  .rts_pin = GPIO_UNDEF,
205  .cts_pin = GPIO_UNDEF,
206 #endif
207  .mux = GPIO_MUX_D,
208  .rx_pad = UART_PAD_RX_1,
209  .tx_pad = UART_PAD_TX_0,
210  .flags = UART_FLAG_NONE,
211  .gclk_src = SAM0_GCLK_MAIN,
212  },
213  {
214  .dev = &SERCOM4->USART,
215  .rx_pin = GPIO_PIN(PB, 11),
216  .tx_pin = GPIO_PIN(PB, 10),
217 #ifdef MODULE_PERIPH_UART_HW_FC
218  .rts_pin = GPIO_UNDEF,
219  .cts_pin = GPIO_UNDEF,
220 #endif
221  .mux = GPIO_MUX_D,
222  .rx_pad = UART_PAD_RX_3,
223  .tx_pad = UART_PAD_TX_2,
224  .flags = UART_FLAG_NONE,
225  .gclk_src = SAM0_GCLK_MAIN,
226  },
227 };
228 
233 #define UART_0_ISR isr_sercom3
234 #define UART_1_ISR isr_sercom4
235 #define UART_2_ISR isr_sercom5
236 #define UART_NUMOF ARRAY_SIZE(uart_config)
243 #define PWM_0_EN 1
244 #define PWM_1_EN 0
245 #define PWM_2_EN 0
263 #if PWM_0_EN
267 static const pwm_conf_chan_t pwm_chan0_config[] = {
268  {GPIO_PIN(PA, 12), GPIO_MUX_E, 0},
269  {GPIO_PIN(PA, 13), GPIO_MUX_E, 1},
270 };
271 #endif
272 #if PWM_1_EN
276 static const pwm_conf_chan_t pwm_chan1_config[] = {
277  {GPIO_PIN(PB, 12), GPIO_MUX_E, 0},
278  {GPIO_PIN(PB, 13), GPIO_MUX_E, 1},
279 };
280 #endif
281 #if PWM_2_EN
285 static const pwm_conf_chan_t pwm_chan2_config[] = {
286  {GPIO_PIN(PB, 02), GPIO_MUX_E, 0},
287  {GPIO_PIN(PB, 03), GPIO_MUX_E, 1},
288 };
289 #endif
290 
294 static const pwm_conf_t pwm_config[] = {
295 #if PWM_0_EN
296  {TCC_CONFIG(TCC2), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
297 #endif
298 #if PWM_1_EN
299  {TCC_CONFIG(TC4), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
300 #endif
301 #if PWM_2_EN
302  {TCC_CONFIG(TC6), pwm_chan2_config, ARRAY_SIZE(pwm_chan2_config), SAM0_GCLK_MAIN},
303 #endif
304 };
305 
310 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
330 static const spi_conf_t spi_config[] = {
331  {
332  .dev = &SERCOM0->SPI,
333  .miso_pin = GPIO_PIN(PA, 4),
334  .mosi_pin = GPIO_PIN(PA, 6),
335  .clk_pin = GPIO_PIN(PA, 7),
336  .miso_mux = GPIO_MUX_D,
337  .mosi_mux = GPIO_MUX_D,
338  .clk_mux = GPIO_MUX_D,
339  .miso_pad = SPI_PAD_MISO_0,
340  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
341  .gclk_src = SAM0_GCLK_MAIN,
342 #ifdef MODULE_PERIPH_DMA
343  .tx_trigger = SERCOM0_DMAC_ID_TX,
344  .rx_trigger = SERCOM0_DMAC_ID_RX,
345 #endif
346  },
347  {
348  .dev = &SERCOM1->SPI,
349  .miso_pin = GPIO_PIN(PA, 16),
350  .mosi_pin = GPIO_PIN(PA, 18),
351  .clk_pin = GPIO_PIN(PA, 19),
352  .miso_mux = GPIO_MUX_C,
353  .mosi_mux = GPIO_MUX_C,
354  .clk_mux = GPIO_MUX_C,
355  .miso_pad = SPI_PAD_MISO_0,
356  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
357  .gclk_src = SAM0_GCLK_MAIN,
358 #ifdef MODULE_PERIPH_DMA
359  .tx_trigger = SERCOM1_DMAC_ID_TX,
360  .rx_trigger = SERCOM1_DMAC_ID_RX,
361 #endif
362  },
363  {
364  .dev = &SERCOM5->SPI,
365  .miso_pin = GPIO_PIN(PB, 16),
366  .mosi_pin = GPIO_PIN(PB, 22),
367  .clk_pin = GPIO_PIN(PB, 23),
368  .miso_mux = GPIO_MUX_C,
369  .mosi_mux = GPIO_MUX_D,
370  .clk_mux = GPIO_MUX_D,
371  .miso_pad = SPI_PAD_MISO_0,
372  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
373  .gclk_src = SAM0_GCLK_MAIN,
374 #ifdef MODULE_PERIPH_DMA
375  .tx_trigger = SERCOM5_DMAC_ID_TX,
376  .rx_trigger = SERCOM5_DMAC_ID_RX,
377 #endif
378  },
379 };
380 
385 #define SPI_NUMOF ARRAY_SIZE(spi_config)
398 static const i2c_conf_t i2c_config[] = {
399  {
400  .dev = &(SERCOM2->I2CM),
401  .speed = I2C_SPEED_NORMAL,
402  .scl_pin = GPIO_PIN(PA, 9),
403  .sda_pin = GPIO_PIN(PA, 8),
404  .mux = GPIO_MUX_D,
405  .gclk_src = SAM0_GCLK_MAIN,
406  .flags = I2C_FLAG_NONE,
407  },
408 };
409 
414 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
421 #ifndef RTT_FREQUENCY
422 #define RTT_FREQUENCY (32768U)
423 #endif
430 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
431 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
432 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
433 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
452 static const adc_conf_chan_t adc_channels[] = {
453  {GPIO_PIN(PB, 0), ADC_INPUTCTRL_MUXPOS_PIN8},
454  {GPIO_PIN(PB, 1), ADC_INPUTCTRL_MUXPOS_PIN9},
455  {GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS_PIN18},
456  {GPIO_PIN(PA, 11), ADC_INPUTCTRL_MUXPOS_PIN19},
457  {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0},
458  {GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1},
459 };
460 
465 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
472 #define DAC_CLOCK SAM0_GCLK_1MHZ
473 #define DAC_VREF DAC_CTRLB_REFSEL_AVCC
486 static const sam0_common_usb_config_t sam_usbdev_config[] = {
487  {
488  .dm = GPIO_PIN(PA, 24),
489  .dp = GPIO_PIN(PA, 25),
490  .d_mux = GPIO_MUX_G,
491  .device = &USB->DEVICE,
492  .gclk_src = SAM0_GCLK_MAIN,
493  },
494 };
495 
496 #ifdef __cplusplus
497 }
498 #endif
499 
500 #endif /* PERIPH_CONF_H */
pwm_chan1_config
static const pwm_conf_chan_t pwm_chan1_config[]
IF PWM_1 is enabled then the following values are configured:
Definition: periph_conf.h:255
uart_config
static const uart_conf_t uart_config[]
Settings for UART.
Definition: periph_conf.h:184
adc_channels
static const adc_conf_chan_t adc_channels[]
ADC channels.
Definition: periph_conf.h:452
pwm_config
static const pwm_conf_t pwm_config[]
Settings for PWM peripheral.
Definition: periph_conf.h:294
sam_usbdev_config
static const sam0_common_usb_config_t sam_usbdev_config[]
USB peripheral settings.
Definition: periph_conf.h:486
spi_config
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:330
timer_config
static const tc32_conf_t timer_config[]
Timer peripheral configuration.
Definition: periph_conf.h:127
i2c_config
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:398
pwm_chan0_config
static const pwm_conf_chan_t pwm_chan0_config[]
By default only channel 0 is enabled, PWM 1 and 2 can be enabled by setting PWM_1_EN and/or PWM_2_EN ...
Definition: periph_conf.h:267