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periph_conf.h
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1 /*
2  * Copyright (C) 2014-2015 Freie Universität Berlin
3  * Copyright (C) 2021 Mesh4all <contact@mesh4all.org>
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include <stdint.h>
26 
27 #include "cpu.h"
28 #include "periph_cpu.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
75 #define CLOCK_USE_PLL (1)
76 
80 #define CLOCK_USE_XOSC32_DFLL (0)
88 #define GEN2_ULP32K (0)
89 
90 #if CLOCK_USE_PLL
95 #define CLOCK_PLL_MUL (47U)
100 #define CLOCK_PLL_DIV (1U)
105 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
106 #elif CLOCK_USE_XOSC32_DFLL
111 #define CLOCK_CORECLOCK (48000000U)
116 #define CLOCK_XOSC32K (32768UL)
117 #define CLOCK_8MHZ (1)
118 #else
123 #define CLOCK_DIV (1U)
124 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
125 #endif
131 static const tc32_conf_t timer_config[] = {
132  {
133  .dev = TC3,
134  .irq = TC3_IRQn,
135  .pm_mask = PM_APBCMASK_TC3,
136  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
137 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
138  .gclk_src = SAM0_GCLK_1MHZ,
139 #else
140  .gclk_src = SAM0_GCLK_MAIN,
141 #endif
142  .flags = TC_CTRLA_MODE_COUNT16,
143  },
144  {
145  .dev = TC4,
146  .irq = TC4_IRQn,
147  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
148  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
149 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
150  .gclk_src = SAM0_GCLK_1MHZ,
151 #else
152  .gclk_src = SAM0_GCLK_MAIN,
153 #endif
154  .flags = TC_CTRLA_MODE_COUNT32,
155  },
156 };
157 
162 #define TIMER_0_MAX_VALUE 0xffff
163 #define TIMER_0_ISR isr_tc3
164 #define TIMER_1_ISR isr_tc4
165 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
172 static const uart_conf_t uart_config[] = {{
173  .dev = &SERCOM0->USART,
174  .rx_pin = GPIO_PIN(PA, 5),
175  .tx_pin = GPIO_PIN(PA, 4),
176 #ifdef MODULE_PERIPH_UART_HW_FC
177  .rts_pin = GPIO_PIN(PA, 6),
178  .cts_pin = GPIO_PIN(PA, 7),
179 #endif
180  .mux = GPIO_MUX_D,
181  .rx_pad = UART_PAD_RX_1,
182 #ifdef MODULE_PERIPH_UART_HW_FC
183  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
184 #else
185  .tx_pad = UART_PAD_TX_0,
186 #endif
187  .flags = UART_FLAG_NONE,
188  .gclk_src = SAM0_GCLK_MAIN,
189  },
190  {
191  .dev = &SERCOM5->USART,
192  .rx_pin = GPIO_PIN(PA, 23),
193  .tx_pin = GPIO_PIN(PA, 22),
194 #ifdef MODULE_PERIPH_UART_HW_FC
195  .rts_pin = GPIO_PIN(PB, 22),
196  .cts_pin = GPIO_PIN(PB, 23),
197 #endif
198  .mux = GPIO_MUX_D,
199  .rx_pad = UART_PAD_RX_1,
200 #ifdef MODULE_PERIPH_UART_HW_FC
201  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
202 #else
203  .tx_pad = UART_PAD_TX_0,
204 #endif
205  .flags = UART_FLAG_NONE,
206  .gclk_src = SAM0_GCLK_MAIN,
207  }};
208 
213 #define UART_0_ISR isr_sercom0
214 #define UART_1_ISR isr_sercom5
215 #define UART_NUMOF ARRAY_SIZE(uart_config)
222 #define PWM_0_EN 1
223 #define PWM_1_EN 1
226 #if PWM_0_EN
237 static const pwm_conf_chan_t pwm_chan0_config[] = {
238  {GPIO_PIN(PA, 6), GPIO_MUX_E, 0},
239  {GPIO_PIN(PA, 7), GPIO_MUX_E, 1},
240 };
241 #endif
242 
243 #if PWM_1_EN
255 static const pwm_conf_chan_t pwm_chan1_config[] = {
256  {GPIO_PIN(PA, 16), GPIO_MUX_F, 0},
257  {GPIO_PIN(PA, 18), GPIO_MUX_F, 2},
258  {GPIO_PIN(PA, 19), GPIO_MUX_F, 3},
259 };
260 #endif
261 
265 static const pwm_conf_t pwm_config[] = {
266 #if PWM_0_EN
267  {TCC_CONFIG(TCC1), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
268 #endif
269 #if PWM_1_EN
270  {TCC_CONFIG(TCC0), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
271 #endif
272 };
273 
278 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
284 static const spi_conf_t spi_config[] = {
285  {
286  .dev = &SERCOM4->SPI,
287  .miso_pin = GPIO_PIN(PC, 19),
288  .mosi_pin = GPIO_PIN(PB, 30),
289  .clk_pin = GPIO_PIN(PC, 18),
290  .miso_mux = GPIO_MUX_F,
291  .mosi_mux = GPIO_MUX_F,
292  .clk_mux = GPIO_MUX_F,
293  .miso_pad = SPI_PAD_MISO_0,
294  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
295  .gclk_src = SAM0_GCLK_MAIN,
296 #ifdef MODULE_PERIPH_DMA
297  .tx_trigger = SERCOM4_DMAC_ID_TX,
298  .rx_trigger = SERCOM4_DMAC_ID_RX,
299 #endif
300  },
301  {
302  .dev = &SERCOM5->SPI,
303  .miso_pin = GPIO_PIN(PB, 2),
304  .mosi_pin = GPIO_PIN(PB, 22),
305  .clk_pin = GPIO_PIN(PB, 23),
306  .miso_mux = GPIO_MUX_D,
307  .mosi_mux = GPIO_MUX_D,
308  .clk_mux = GPIO_MUX_D,
309  .miso_pad = SPI_PAD_MISO_0,
310  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
311  .gclk_src = SAM0_GCLK_MAIN,
312 #ifdef MODULE_PERIPH_DMA
313  .tx_trigger = SERCOM5_DMAC_ID_TX,
314  .rx_trigger = SERCOM5_DMAC_ID_RX,
315 #endif
316  },
317 };
318 
323 #define SPI_NUMOF ARRAY_SIZE(spi_config)
333 static const i2c_conf_t i2c_config[] = {{.dev = &(SERCOM3->I2CM),
334  .speed = I2C_SPEED_NORMAL,
335  .scl_pin = GPIO_PIN(PA, 17),
336  .sda_pin = GPIO_PIN(PA, 16),
337  .mux = GPIO_MUX_D,
338  .gclk_src = SAM0_GCLK_MAIN,
339  .flags = I2C_FLAG_NONE}};
340 
345 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
352 #ifndef RTT_FREQUENCY
358 #define RTT_FREQUENCY (32768U)
359 #endif
360 #define RTT_MIN_OFFSET (10U)
367 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
368 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
369 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
370 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
373 #ifdef CONFIG_ADC_VREF_DEFAULT
374 #undef ADC_REF_DEFAULT
375 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
376 #endif
377 #ifdef CONFIG_ADC_VREF_INTVCC0
378 #undef ADC_REF_DEFAULT
379 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC0
380 #endif
381 #ifdef CONFIG_ADC_VREF_INTVCC1
382 #undef ADC_REF_DEFAULT
383 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
384 #endif
385 #ifdef CONFIG_ADC_VREF_EXT1
386 #undef ADC_REF_DEFAULT
387 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_AREFA
388 #endif
389 #ifdef CONFIG_ADC_VREF_EXT1
390 #undef ADC_REF_DEFAULT
391 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_AREFB
392 #endif
393 
397 static const adc_conf_chan_t adc_channels[] = {
398  {GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS_PIN6},
399  {GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS_PIN7},
400 };
401 
406 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
412 static const sam0_common_usb_config_t sam_usbdev_config[] = {{
413  .dm = GPIO_PIN(PA, 24),
414  .dp = GPIO_PIN(PA, 25),
415  .d_mux = GPIO_MUX_G,
416  .device = &USB->DEVICE,
417  .gclk_src = SAM0_GCLK_MAIN,
418 }};
419 
420 #ifdef __cplusplus
421 }
422 #endif
423 
424 #endif /* PERIPH_CONF_H */
uart_config
static const uart_conf_t uart_config[]
UART config.
Definition: periph_conf.h:172
adc_channels
static const adc_conf_chan_t adc_channels[]
ADC configuration.
Definition: periph_conf.h:397
pwm_config
static const pwm_conf_t pwm_config[]
PWM device configuration.
Definition: periph_conf.h:265
sam_usbdev_config
static const sam0_common_usb_config_t sam_usbdev_config[]
USB peripheral configuration.
Definition: periph_conf.h:412
pwm_chan1_config
static const pwm_conf_chan_t pwm_chan1_config[]
IF PWM_1 is enabled then the following values are configured:
Definition: periph_conf.h:255
spi_config
static const spi_conf_t spi_config[]
SPI config.
Definition: periph_conf.h:284
timer_config
static const tc32_conf_t timer_config[]
Timer peripheral configuration.
Definition: periph_conf.h:131
i2c_config
static const i2c_conf_t i2c_config[]
I2C devices configuration.
Definition: periph_conf.h:333
pwm_chan0_config
static const pwm_conf_chan_t pwm_chan0_config[]
IF PWM_0 is enabled then the following values are configured:
Definition: periph_conf.h:237